The CUBIC experiment uses two three-phase frontside-illuminated CCDs
built by EEV (model CCD-12-30-4-202).
The CCD has 
pixels.
The pixel size is 
m 
m.
There are four identical low noise output amplifiers, one
in each corner of the CCD.
These detectors incorporate a 4 micron ``notch'' in the parallel
array and a 5 micron notch in the serial array to improve their
radiation hardness. They are built on
high-resistivity epitaxial
material to provide good sensitivity up to 10 keV.
(The first batch of CCDs we received, CUBIC0--CUBIC3,
was built on an experimental lot of high resistivity
m epi material with 
-cm
resistivity. This material was found to exhibit serious
slip defects in some devices and poor CTI,
, in all devices. The second
batch of devices, CUBIC6--CUBIC9, was built on 
m epi material
from the EOBB program with 
-cm
resistivity. These CCDs are nearly perfect cosmetically
and have very good CTI, 
, and good
energy resolution. These will be used as the CUBIC \
flight detectors. The architecture of both batches is
identical.)
The design of this device is shown in Figure 9.
The architecture of the CCD-12-30 die allows these devices to be read out through any combination of the four amplifiers. The parallel array is split in half with independent clocks, permitting the device to be used in either frame-store (768 x 512) or full-frame (768 x 1024) mode. For CUBIC , we will operate in frame-store mode and will read out through amplifiers A3 and A4, so the B section will be used as our imaging array and the A section will be used as our frame-store array.
Each serial register is also split in half, but the CUBIC package wires the two halves of each register together. This allows us to use either amplifier on a given serial register, but not both at the same time (i.e., the charge can be clocked to either amp, but cannot be split in the middle of the serial register and clocked to both amps). Each end of each serial register has 8 guard/extended pixels followed by 8 dark reference pixels (8 columns in the parallel register covered by Al and therefore insensitive to light). With the 768 imaging pixels, the total pixel count per row is 800 pixels plus overclocks. For flight we are using 32 overclocks, for a total of 832 pixels per row. (However, only pixels 18-783 are processed on-board to find X-ray events. The remaining pixels can only be examined in full-frame compressed data.) This structure is shown in Figure 10.
(The clocking waveforms used to calibrate the CUBIC CCDs in our laboratory cameras digitize before clocking: the previous pixel is digitized before the current pixel is clocked in order to minimize noise from clock feedthroughs and to minimize the read time. A result of this peculiarity of our clocking scheme is that the first pixel digitized is not physical and the last pixel clocked is never digitized. Therefore, the first column of a readout is always garbage and the entire frame is shifted one column to the right from its correct position.) Note that this applies only to data taken in the lab cameras. The waveforms written for the flight camera handle the first pixel correctly and do not include this shift. Therefore, one must be careful in obtaining bad pixel or bad column locations from the lab camera data, since the column numbers are not correct.
The thin gate design of this CCD provides a substantial improvement
in low energy quantum efficiency (QE) compared with typical frontside-illuminated
CCD designs (McCarthy & Wells 1992).
The
gates for the three clock phases are concentrated over 
of the pixel surface, leaving 63% of the pixel area covered only by
1700Å of polysilicon gates plus the oxide/nitride insulator
(850Å each). This
gate structure is shown in Figures 11.
The correspondence between poly level and clock phase is not obvious
in the EEV devices. POLY1 (poly level 1) is attached to clock phase
3 (A
3, B
3), POLY2 is attached to clock phase 2, and
POLY3 is attached to clock phase 1. Charge is integrated under
clock phases 1 and 2 (POLY3 and POLY2, respectively).
In principle, these voltages
can be set high during integration to increase the depletion depth.
In practice, however, charge is integrated with phases 1 and 2 set
to 3.55V and phase 3 set to -8.1V.
As shown in Figure 8, the two CCDs in CUBIC are
designated CCD1 and CCD2. CCD1 is displaced in the -Y direction
with respect to the camera center, and looks in a direction offset by
from the X axis towards the +Y axis. CCD2 is displaced
in the +Y direction
with respect to the camera center, and looks in a direction offset by
from the X axis towards the -Y axis.
The CCDs are operated in frame-store mode. While this mode reduces
the useful collecting area by a factor of two, it permits us to use short
(
s minimum) exposures and still retain information about the location of each
X-ray on the CCD (which can be used to try to correct for CTE problems
associated with radiation damage).
Our inventory of CCDs for CUBIC is shown in Table 3. CCD1 is CUBIC6 and CCD2 is CUBIC7.
Table 2: CUBIC CG and MOI Calculations
